1. Field of the Invention
The present invention relates to data processing systems, and more particularly to a processing system comprising a plurality of heterogenous processors arranged to operate as a word processor.
2. Description of the Prior Art
In the recent past the advent of LSI circuitry has enabled wide use of low cost data processing devices commonly referred to as microprocessors. Most such microprocessors comprise a central processing unit, or a CPU, which in association with a primary memory, communicates with the outside world by way of input and output ports. While there has been improvement in the integration of the CPU and particularly in the switching time thereof, it is the integration of large scale memory chips that is the main element rendering such microprocessors possible. Typically, in the interest of fast access time, such memory elements take the form of a random access memory (RAM) and are thus directly addressable with an access time in the instruction time domain of the CPU. Thus, the memory access function became inherently compatible with CPU sequences and many control schemes previously performed by switching logic were converted to stored program form to be thus implemented in a microprocessor.
Semiconductor memory although now integrated extensively, is still relatively expensive for large data storage applications. Accordingly, most prior art systems utilize a secondary storage, usually much slower, for the on-line storage system. The primary storage then functions as an accelerator memory for active on-line data in order to better match the memory access rate with the CPU instruction rate.
In the past, there have been many techniques developed to accommodate this memory expansion function. Most such techniques, however, entail the use of the CPU as the servicing module through which the memory expansion is performed. Thus, during the execution of a particular instruction sequence involved in some logical process, interruptions would be periodically required for memory service. Adaptation of a microprocessor serving as a CPU to perform logical operations then becomes increasingly difficult as more use of secondary storage is required. Use of secondary storage becomes even more pronounced when microprocessors of this kind are combined to function in word processing systems.
Word processing, as now used in the art, is a term denoting automation of many services previously performed by a secretary. These functions when automated, however, require normally large main memory systems where functions like form letter preparation or standard paragraph insertion are exemplary in the volume of data storage that they require. Due to considerations of cost, data of this bulk is still best handled by serial secondary storage devices like Charge Coupled Devices (CCD), bubble memory, discs or magnetic tape.
One other feature particular to microprocessors is the handling of the input-output interfaces. In addition to memory expansion, microprocessors normally include as a central processing task the maintenance of the input and output ports. Since the CPU is a sequential device, the periods during which it maintains the interface are frequently referred to as interrupt periods during which no other operation can again occur. Thus, the undivided attention of the CPU alternates either to the problem operations or the servicing of input, output and memory. One typical output servicing function is for the display interface which normally requires a large servicing sequence. Typically the display is made by devices like a CRT which because of its physical constraints requires updating maintenance and which often require memory service to accommodate the amount of test normally displayed.
The above functions each relate to physical time constraints which encompass a very wide bandpass. On the low end the asynchronous real time inputs from the operator (e.g., keyboard stroke) entail program sequences which are not critical in their execution time. At the high end, the video display dictates very high data refresh rates fixed to the vertical and horizontal sync system of a CRT.
Heretofore most prior art systems attempted to accommodate these diverse requirements in a singular system which therefore entailed complex architecture and became quickly frozen in the amount of expansion or modification that can be achieved. Thus most such prior art systems either traded features for complexity or reduced the function complement of the system.
Word processing systems are best accommodated in work station clusters which may share a common memory. Where the memory is tied to a complex system structure expansion into additional work stations becomes increasingly difficult. For all of these reasons the system described herein is conformed in autonomous processing segments which therefore allow for convenient expansion of both the operating functions and the number of work stations forming a cluster.